An ultrafast front-end ASIC for APD array detectors in X-ray time-resolved experiments

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Yang-Fan Zhou, Qiu-Ju Li, Peng Liu, Lei Fan, Wei Xu, Ye Tao and Zhen-Jie Li. An ultrafast front-end ASIC for APD array detectors in X-ray time-resolved experiments[J]. Chinese Physics C, 2017, 41(6): 066101. doi: 10.1088/1674-1137/41/6/066101
Yang-Fan Zhou, Qiu-Ju Li, Peng Liu, Lei Fan, Wei Xu, Ye Tao and Zhen-Jie Li. An ultrafast front-end ASIC for APD array detectors in X-ray time-resolved experiments[J]. Chinese Physics C, 2017, 41(6): 066101.  doi: 10.1088/1674-1137/41/6/066101 shu
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Received: 2017-02-04
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    Supported by the National Natural Science Foundation of China (11605227), High Energy Photon Source-Test Facility Project, and the State Key Laboratory of Particle Detection and Electronics. This research used resources of the BSRF.}

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An ultrafast front-end ASIC for APD array detectors in X-ray time-resolved experiments

    Corresponding author: Yang-Fan Zhou,
    Corresponding author: Zhen-Jie Li,
  • 1.  Beijing Synchrotron Radiation Facility, Institute of High Energy Physics, Chinese Academy of Sciences, Beijing 100049, China
  • 2.  State Key Laboratory of Particle Detection and Electronics, Institute of High Energy Physics, Chinese Academy of Sciences, Beijing 100049, China
Fund Project:  Supported by the National Natural Science Foundation of China (11605227), High Energy Photon Source-Test Facility Project, and the State Key Laboratory of Particle Detection and Electronics. This research used resources of the BSRF.}

Abstract: An ultrafast front-end ASIC chip has been developed for APD array detectors in X-ray time-resolved experiments. The chip has five channels: four complete channels and one test channel with an analog output. Each complete channel consists of a preamplifier, a voltage discriminator and an open-drain output driver. A prototype chip has been designed and fabricated using 0.13 μm CMOS technology with a chip size of 1.3 mm×1.9 mm. The electrical characterizations of the circuit demonstrate a very good intrinsic time resolution (rms) on the output pulse leading edge, with the test result better than 30 ps for high input signal charges (> 75 fC) and better than 100 ps for low input signal charges (30-75 fC), while keeping a low power consumption of 5 mW per complete channel.

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